WIP: codegen: add B-ASIC commit hash in VHDL preamble
This adds the (short) Git commit ID of HEAD to the VHDL codegen preamble. Useful when debugging generated code.
Ex:
--
-- This code was automatically generated by the B-ASIC toolbox.
-- Code generation timestamp: (2023-03-15 14:47:44.405842)
-- B-ASIC short commit hash: fa55492
-- URL: https://gitlab.liu.se/da/B-ASIC
--
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
Edited by Mikael Henriksson
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I would say that a feature like this would be really good for the code generation stuff. I believe this particular commit snuck in elsewhere, as I needed it to keep track of source code versions for FPL. I'll see if I can make a better version of this later today or this weekend, as I think it is important. In the meantime, I would say to leave this PR be.
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