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WIP: VHDL code generation for register and memory based storages

Merged WIP: VHDL code generation for register and memory based storages
resource-hdl into master
Merged Mikael Henriksson requested to merge resource-hdl into master
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b_asic/codegen/testbench/.gitignore 0 → 100644
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vunit_out
streaming_matrix_transposition_memory_*x*.vhdl
streaming_matrix_transposition_register_*x*.vhdl
work
1076.1-2017