test/fixtures/port.py

 import pytest
-from b_asic.port import InputPort, OutputPort
+
+from b_asic import InputPort, OutputPort
+
 
 @pytest.fixture
 def input_port():
-    return InputPort(0, None)
+    return InputPort(None, 0)
 
 @pytest.fixture
 def output_port():
-    return OutputPort(0, None)
+    return OutputPort(None, 0)
+
+@pytest.fixture
+def list_of_input_ports():
+    return [InputPort(None, i) for i in range(0, 3)]
+
+@pytest.fixture
+def list_of_output_ports():
+    return [OutputPort(None, i) for i in range(0, 3)]

test/fixtures/signal.py

 import pytest
+
 from b_asic import Signal
 
+
 @pytest.fixture
 def signal():
     """Return a signal with no connections."""
@@ -9,4 +11,4 @@ def signal():
 @pytest.fixture
 def signals():
     """Return 3 signals with no connections."""
-    return [Signal() for _ in range(0,3)]
+    return [Signal() for _ in range(0, 3)]

test/fixtures/signal_flow_graph.py

+import pytest
+
+from b_asic import SFG, Input, Output, Constant, Register, ConstantMultiplication, Addition, Butterfly
+
+
+@pytest.fixture
+def sfg_two_inputs_two_outputs():
+    """Valid SFG with two inputs and two outputs.
+             .               .
+    in1-------+  +--------->out1
+         .    |  |       .
+         .    v  |       .
+         .   add1+--+    .
+         .    ^     |    .
+         .    |     v    .
+    in2+------+    add2---->out2
+       | .          ^    .
+       | .          |    .
+       +------------+    .
+             .               .
+    out1 = in1 + in2
+        out2 = in1 + 2 * in2
+    """
+    in1 = Input()
+    in2 = Input()
+    add1 = in1 + in2
+    add2 = add1 + in2
+    out1 = Output(add1)
+    out2 = Output(add2)
+    return SFG(inputs=[in1, in2], outputs=[out1, out2])
+
+
+@pytest.fixture
+def sfg_two_inputs_two_outputs_independent():
+    """Valid SFG with two inputs and two outputs, where the first output only depends
+    on the first input and the second output only depends on the second input.
+             .               .
+    in1-------------------->out1
+         .               .
+         .               .
+         .      c1--+    .
+         .          |    .
+         .          v    .
+    in2------+     add1---->out2
+         .   |      ^    .
+         .   |      |    .
+         .   +------+    .
+             .               .
+    out1 = in1
+        out2 = in2 + 3
+    """
+    in1 = Input("IN1")
+    in2 = Input("IN2")
+    c1 = Constant(3, "C1")
+    add1 = Addition(in2, c1, "ADD1")
+    out1 = Output(in1, "OUT1")
+    out2 = Output(add1, "OUT2")
+    return SFG(inputs=[in1, in2], outputs=[out1, out2])
+
+
+@pytest.fixture
+def sfg_nested():
+    """Valid SFG with two inputs and one output.
+    out1 = in1 + (in1 + in1 * in2) * (in1 + in2 * (in1 + in1 * in2))
+    """
+    mac_in1 = Input()
+    mac_in2 = Input()
+    mac_in3 = Input()
+    mac_out1 = Output(mac_in1 + mac_in2 * mac_in3)
+    MAC = SFG(inputs=[mac_in1, mac_in2, mac_in3], outputs=[mac_out1])
+
+    in1 = Input()
+    in2 = Input()
+    mac1 = MAC(in1, in1, in2)
+    mac2 = MAC(in1, in2, mac1)
+    mac3 = MAC(in1, mac1, mac2)
+    out1 = Output(mac3)
+    return SFG(inputs=[in1, in2], outputs=[out1])
+
+
+@pytest.fixture
+def sfg_delay():
+    """Valid SFG with one input and one output.
+    out1 = in1'
+    """
+    in1 = Input()
+    reg1 = Register(in1)
+    out1 = Output(reg1)
+    return SFG(inputs=[in1], outputs=[out1])
+
+@pytest.fixture
+def sfg_simple_accumulator():
+    """Valid SFG with one input and one output. With feedback. Explained in lecture 5.
+    in>--->add>-------o--->out
+            ^         |
+            |         |
+            |--<T<-----
+    """
+    data_in = Input()
+    reg = Register()
+    add = data_in + reg
+    reg.input(0).connect(add)
+    data_out = Output(add)
+    return SFG(inputs=[data_in], outputs=[data_out], name="simple_accumulator")
+
+@pytest.fixture
+def sfg_unfolded_simple_accumulator():
+    """Valid unfolded simple accumulator SFG with two inputs and two outputs. With feedback. Explained in lecture 5.
+    in(2n)>----->add>---o------->out(2n)
+                  ^     |
+                  |     |
+                  ^     |
+                  T<----|----
+                        |   |
+                  |------   |      
+                  v         ^
+    in(2n+1)>--->add> ------o--->out(2n+1)
+    """
+    in_2n  = Input()
+    in_2n1 = Input()
+
+    add_upper = Addition()
+    add_lower = in_2n1 + add_upper
+    reg = Register(add_lower)
+    add_upper.input(0).connect(in_2n)
+    add_upper.input(1).connect(reg)
+    out_2n  = Output(add_upper)
+    out_2n1 = Output(add_lower)
+    return SFG(inputs=[in_2n, in_2n1], outputs=[out_2n, out_2n1], name="unfolded_simple_accumulator")
+
+@pytest.fixture
+def sfg_accumulator():
+    """Valid SFG with two inputs and one output.
+    data_out = (data_in' + data_in) * (1 - reset)
+    """
+    data_in = Input()
+    reset = Input()
+    reg = Register()
+    reg.input(0).connect((reg + data_in) * (1 - reset))
+    data_out = Output(reg)
+    return SFG(inputs=[data_in, reset], outputs=[data_out])
+
+
+@pytest.fixture
+def simple_filter():
+    """A valid SFG that is used as a filter in the first lab for TSTE87.
+                +----<constmul1----+
+                |                  |
+                |                  |
+    in1>------add1>------reg>------+------out1>
+    """
+    in1 = Input("IN1")
+    constmul1 = ConstantMultiplication(0.5, name="CMUL1")
+    add1 = Addition(in1, constmul1, "ADD1")
+    add1.input(1).signals[0].name = "S2"
+    reg = Register(add1, name="REG1")
+    constmul1.input(0).connect(reg, "S1")
+    out1 = Output(reg, "OUT1")
+    return SFG(inputs=[in1], outputs=[out1], name="simple_filter")
+
+
+@pytest.fixture
+def precedence_sfg_registers():
+    """A sfg with registers and interesting layout for precednce list generation.
+
+    IN1>--->C0>--->ADD1>--->Q1>---+--->A0>--->ADD4>--->OUT1
+                     ^            |            ^
+                     |            T1           |
+                     |            |            |
+                   ADD2<---<B1<---+--->A1>--->ADD3
+                     ^            |            ^
+                     |            T2           |
+                     |            |            |
+                     +-----<B2<---+--->A2>-----+
+    """
+    in1 = Input("IN1")
+    c0 = ConstantMultiplication(5, in1, "C0")
+    add1 = Addition(c0, None, "ADD1")
+    # Not sure what operation "Q" is supposed to be in the example
+    Q1 = ConstantMultiplication(1, add1, "Q1")
+    T1 = Register(Q1, 0, "T1")
+    T2 = Register(T1, 0, "T2")
+    b2 = ConstantMultiplication(2, T2, "B2")
+    b1 = ConstantMultiplication(3, T1, "B1")
+    add2 = Addition(b1, b2, "ADD2")
+    add1.input(1).connect(add2)
+    a1 = ConstantMultiplication(4, T1, "A1")
+    a2 = ConstantMultiplication(6, T2, "A2")
+    add3 = Addition(a1, a2, "ADD3")
+    a0 = ConstantMultiplication(7, Q1, "A0")
+    add4 = Addition(a0, add3, "ADD4")
+    out1 = Output(add4, "OUT1")
+
+    return SFG(inputs=[in1], outputs=[out1], name="SFG")
+
+
+@pytest.fixture
+def precedence_sfg_registers_and_constants():
+    in1 = Input("IN1")
+    c0 = ConstantMultiplication(5, in1, "C0")
+    add1 = Addition(c0, None, "ADD1")
+    # Not sure what operation "Q" is supposed to be in the example
+    Q1 = ConstantMultiplication(1, add1, "Q1")
+    T1 = Register(Q1, 0, "T1")
+    const1 = Constant(10, "CONST1")  # Replace T2 register with a constant
+    b2 = ConstantMultiplication(2, const1, "B2")
+    b1 = ConstantMultiplication(3, T1, "B1")
+    add2 = Addition(b1, b2, "ADD2")
+    add1.input(1).connect(add2)
+    a1 = ConstantMultiplication(4, T1, "A1")
+    a2 = ConstantMultiplication(10, const1, "A2")
+    add3 = Addition(a1, a2, "ADD3")
+    a0 = ConstantMultiplication(7, Q1, "A0")
+    # Replace ADD4 with a butterfly to test multiple output ports
+    bfly1 = Butterfly(a0, add3, "BFLY1")
+    out1 = Output(bfly1.output(0), "OUT1")
+    out2 = Output(bfly1.output(1), "OUT2")
+
+    return SFG(inputs=[in1], outputs=[out1, out2], name="SFG")

test/operation/test_abstract_operation.py → test/test_abstract_operation.py

@@ -2,11 +2,10 @@
 B-ASIC test suite for the AbstractOperation class.
 """
 
-from b_asic.core_operations import Addition, ConstantAddition, Subtraction, ConstantSubtraction, \
-    Multiplication, ConstantMultiplication, Division, ConstantDivision
-
 import pytest
 
+from b_asic import Addition, Subtraction, Multiplication, ConstantMultiplication, Division
+
 
 def test_addition_overload():
     """Tests addition overloading for both operation and number argument."""
@@ -14,15 +13,19 @@ def test_addition_overload():
     add2 = Addition(None, None, "add2")
 
     add3 = add1 + add2
-
     assert isinstance(add3, Addition)
     assert add3.input(0).signals == add1.output(0).signals
     assert add3.input(1).signals == add2.output(0).signals
 
     add4 = add3 + 5
-
-    assert isinstance(add4, ConstantAddition)
+    assert isinstance(add4, Addition)
     assert add4.input(0).signals == add3.output(0).signals
+    assert add4.input(1).signals[0].source.operation.value == 5
+
+    add5 = 5 + add4
+    assert isinstance(add5, Addition)
+    assert add5.input(0).signals[0].source.operation.value == 5
+    assert add5.input(1).signals == add4.output(0).signals
 
 
 def test_subtraction_overload():
@@ -31,15 +34,19 @@ def test_subtraction_overload():
     add2 = Addition(None, None, "add2")
 
     sub1 = add1 - add2
-
     assert isinstance(sub1, Subtraction)
     assert sub1.input(0).signals == add1.output(0).signals
     assert sub1.input(1).signals == add2.output(0).signals
 
     sub2 = sub1 - 5
-
-    assert isinstance(sub2, ConstantSubtraction)
+    assert isinstance(sub2, Subtraction)
     assert sub2.input(0).signals == sub1.output(0).signals
+    assert sub2.input(1).signals[0].source.operation.value == 5
+
+    sub3 = 5 - sub2
+    assert isinstance(sub3, Subtraction)
+    assert sub3.input(0).signals[0].source.operation.value == 5
+    assert sub3.input(1).signals == sub2.output(0).signals
 
 
 def test_multiplication_overload():
@@ -48,15 +55,19 @@ def test_multiplication_overload():
     add2 = Addition(None, None, "add2")
 
     mul1 = add1 * add2
-
     assert isinstance(mul1, Multiplication)
     assert mul1.input(0).signals == add1.output(0).signals
     assert mul1.input(1).signals == add2.output(0).signals
 
     mul2 = mul1 * 5
-
     assert isinstance(mul2, ConstantMultiplication)
     assert mul2.input(0).signals == mul1.output(0).signals
+    assert mul2.value == 5
+
+    mul3 = 5 * mul2
+    assert isinstance(mul3, ConstantMultiplication)
+    assert mul3.input(0).signals == mul2.output(0).signals
+    assert mul3.value == 5
 
 
 def test_division_overload():
@@ -65,13 +76,16 @@ def test_division_overload():
     add2 = Addition(None, None, "add2")
 
     div1 = add1 / add2
-
     assert isinstance(div1, Division)
     assert div1.input(0).signals == add1.output(0).signals
     assert div1.input(1).signals == add2.output(0).signals
 
     div2 = div1 / 5
-
-    assert isinstance(div2, ConstantDivision)
+    assert isinstance(div2, Division)
     assert div2.input(0).signals == div1.output(0).signals
+    assert div2.input(1).signals[0].source.operation.value == 5
 
+    div3 = 5 / div2
+    assert isinstance(div3, Division)
+    assert div3.input(0).signals[0].source.operation.value == 5
+    assert div3.input(1).signals == div2.output(0).signals