Skip to content
GitLab
Explore
Sign in
Primary navigation
Search or go to…
Project
B-ASIC - Better ASIC Toolbox
Manage
Activity
Members
Labels
Plan
Issues
Issue boards
Milestones
Iterations
Requirements
Code
Merge requests
Repository
Branches
Commits
Tags
Repository graph
Compare revisions
Snippets
Locked files
Build
Pipelines
Jobs
Pipeline schedules
Test cases
Artifacts
Deploy
Releases
Package registry
Model registry
Operate
Environments
Terraform modules
Monitor
Incidents
Analyze
Value stream analytics
Contributor analytics
CI/CD analytics
Repository analytics
Code review analytics
Issue analytics
Insights
Model experiments
Help
Help
Support
GitLab documentation
Compare GitLab plans
Community forum
Contribute to GitLab
Provide feedback
Terms and privacy
Keyboard shortcuts
?
Snippets
Groups
Projects
Show more breadcrumbs
Computer Engineering
B-ASIC - Better ASIC Toolbox
Commits
7d53d11f
Commit
7d53d11f
authored
4 years ago
by
Kevin
Browse files
Options
Downloads
Patches
Plain Diff
added test case for replacing multiply-and-add with MAC
parent
60a87ac1
No related branches found
Branches containing commit
No related tags found
2 merge requests
!44
Resolve "Operation Replacement in a SFG"
,
!42
Resolve "Operation to SFG Conversion"
Pipeline
#14014
failed
4 years ago
Stage: test
Changes
1
Pipelines
1
Hide whitespace changes
Inline
Side-by-side
Showing
1 changed file
test/test_sfg.py
+20
-1
20 additions, 1 deletion
test/test_sfg.py
with
20 additions
and
1 deletion
test/test_sfg.py
+
20
−
1
View file @
7d53d11f
import
pytest
from
b_asic
import
SFG
,
Signal
,
Input
,
Output
,
Constant
,
Addition
,
Multiplication
from
b_asic
import
SFG
,
Signal
,
Input
,
Output
,
Constant
,
Addition
,
Multiplication
,
MAD
class
TestInit
:
...
...
@@ -254,3 +254,22 @@ class TestReplaceComponents:
assert
True
else
:
assert
False
class
TestReplaceOperations
:
def
test_replace_mul_add_with_MAD
(
self
):
in1
=
Input
()
in2
=
Input
()
in3
=
Input
()
mul1
=
in1
*
in2
add1
=
mul1
+
in3
out1
=
Output
(
add1
)
sfg
=
SFG
(
inputs
=
[
in1
,
in2
,
in3
],
outputs
=
[
out1
])
assert
len
(
sfg
.
operations
)
==
6
mad1
=
MAD
()
sfg
.
replace_operations
([
in1
,
in2
,
in3
],
[
out1
],
mad1
)
assert
len
(
sfg
.
operations
)
==
5
assert
{
add1
,
mul1
}
not
in
sfg
.
operations
\ No newline at end of file
This diff is collapsed.
Click to expand it.
Preview
0%
Loading
Try again
or
attach a new file
.
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Save comment
Cancel
Please
register
or
sign in
to comment