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Computer Engineering
B-ASIC - Better ASIC Toolbox
Commits
1e432b0e
Commit
1e432b0e
authored
1 year ago
by
Oscar Gustafsson
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Improve Winograd examples slighlty
parent
d44a46f2
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1 merge request
!427
Improve Winograd examples slighlty
Pipeline
#102704
passed
1 year ago
Stage: test
Stage: deploy
Changes
2
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2
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2 changed files
examples/fivepointwinograddft.py
+5
-2
5 additions, 2 deletions
examples/fivepointwinograddft.py
examples/threepointwinograddft.py
+8
-15
8 additions, 15 deletions
examples/threepointwinograddft.py
with
13 additions
and
17 deletions
examples/fivepointwinograddft.py
+
5
−
2
View file @
1e432b0e
...
...
@@ -2,6 +2,8 @@
=======================
Five-point Winograd DFT
=======================
First, define the SFG/block diagram
"""
from
math
import
cos
,
pi
,
sin
...
...
@@ -77,7 +79,8 @@ schedule = Schedule(sfg, cyclic=True)
schedule
.
show
()
# %%
# Reschedule to only use one AddSub and one multiplier
# Reschedule to only use one AddSub, one Butterfly, and one ConstantMultiplication per
# time unit
schedule
.
set_schedule_time
(
10
)
schedule
.
move_operation
(
'
out4
'
,
12
)
...
...
@@ -161,7 +164,7 @@ memories = []
for
i
,
mem
in
enumerate
(
mem_vars_set
):
memory
=
Memory
(
mem
,
memory_type
=
"
RAM
"
,
entity_name
=
f
"
memory
{
i
}
"
)
memories
.
append
(
memory
)
mem
.
show
(
title
=
f
"
{
memory
.
entity_name
}
"
)
mem
.
show
(
title
=
f
"
{
memory
.
entity_name
}
variables
"
)
memory
.
assign
(
"
left_edge
"
)
memory
.
show_content
(
title
=
f
"
Assigned
{
memory
.
entity_name
}
"
)
...
...
This diff is collapsed.
Click to expand it.
examples/threepointwinograddft.py
+
8
−
15
View file @
1e432b0e
...
...
@@ -57,33 +57,26 @@ sfg.set_execution_time_of_type(AddSub.type_name(), 1)
schedule
=
Schedule
(
sfg
,
cyclic
=
True
)
schedule
.
show
()
# Reschedule to only use one AddSub and one
multiplier
# Reschedule to only use one AddSub and one
ConstantMultiplication per time unit
schedule
.
set_schedule_time
(
10
)
schedule
.
move_operation
(
'
out1
'
,
3
)
schedule
.
move_operation
(
'
out2
'
,
4
)
schedule
.
move_operation
(
'
out0
'
,
11
)
schedule
.
move_operation
(
'
out1
'
,
9
)
schedule
.
move_operation
(
'
out2
'
,
10
)
schedule
.
move_operation
(
'
addsub4
'
,
2
)
schedule
.
move_operation
(
'
addsub3
'
,
3
)
schedule
.
move_operation
(
'
addsub2
'
,
2
)
schedule
.
move_operation
(
'
cmul1
'
,
2
)
schedule
.
move_operation
(
'
cmul0
'
,
2
)
schedule
.
move_operation
(
'
out0
'
,
5
)
schedule
.
move_operation
(
'
addsub0
'
,
3
)
schedule
.
move_operation
(
'
addsub5
'
,
2
)
schedule
.
move_operation
(
'
addsub1
'
,
2
)
schedule
.
move_operation
(
'
in1
'
,
1
)
schedule
.
move_operation
(
'
in2
'
,
2
)
schedule
.
move_operation
(
'
cmul1
'
,
1
)
schedule
.
move_operation
(
'
out2
'
,
6
)
schedule
.
move_operation
(
'
out1
'
,
6
)
schedule
.
move_operation
(
'
out0
'
,
6
)
schedule
.
move_operation
(
'
addsub5
'
,
1
)
schedule
.
move_operation
(
'
addsub3
'
,
3
)
schedule
.
move_operation
(
'
addsub4
'
,
4
)
schedule
.
move_operation
(
'
addsub3
'
,
1
)
schedule
.
move_operation
(
'
addsub4
'
,
4
)
schedule
.
move_operation
(
'
cmul1
'
,
3
)
schedule
.
move_operation
(
'
addsub3
'
,
2
)
schedule
.
move_operation
(
'
cmul1
'
,
3
)
schedule
.
move_operation
(
'
addsub3
'
,
6
)
schedule
.
move_operation
(
'
addsub4
'
,
8
)
schedule
.
move_operation
(
'
cmul1
'
,
6
)
schedule
.
move_operation
(
'
addsub2
'
,
5
)
schedule
.
set_schedule_time
(
6
)
schedule
.
move_operation
(
'
addsub0
'
,
1
)
...
...
@@ -126,7 +119,7 @@ memories = []
for
i
,
mem
in
enumerate
(
mem_vars_set
):
memory
=
Memory
(
mem
,
memory_type
=
"
RAM
"
,
entity_name
=
f
"
memory
{
i
}
"
)
memories
.
append
(
memory
)
mem
.
show
(
title
=
f
"
{
memory
.
entity_name
}
"
)
mem
.
show
(
title
=
f
"
{
memory
.
entity_name
}
variables
"
)
memory
.
assign
(
"
left_edge
"
)
memory
.
show_content
(
title
=
f
"
Assigned
{
memory
.
entity_name
}
"
)
...
...
This diff is collapsed.
Click to expand it.
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