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B-ASIC documentation
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B-ASIC documentation
  • B-ASIC’s documentation
  • API
    • b_asic.architecture
    • b_asic.core_operations
    • b_asic.graph_component
    • b_asic.list_schedulers
    • b_asic.operation
    • b_asic.port
    • b_asic.process
    • b_asic.quantization
    • b_asic.resources
    • b_asic.save_load_structure
    • b_asic.schedule
    • b_asic.scheduler
    • b_asic.sfg_generators
    • b_asic.signal
    • b_asic.signal_flow_graph
    • b_asic.signal_generator
    • b_asic.simulation
    • b_asic.special_operations
    • b_asic.utils
  • Block Diagram GUI
  • Scheduler GUI
  • GUI Utilities
  • Code generation
    • b_asic.codegen.vhdl
  • Examples
    • Introduction example for the TSTE87 course
    • Example SFG used for scheduling in the TSTE87 course
    • LWDF first-order allpass section
    • Connecting multiple SFGs
    • Automatic scheduling for different latency-offsets
    • Third-order Bireciprocal LWDF
    • Two-tap FIR filter
    • First-order IIR Filter with Simulation
    • Second-order IIR Filter with Schedule
    • Automatic scheduling with custom IO times
    • Scheduling and Pipelining/Retiming
    • Comparison with folding
    • Second-order IIR Filter with Architecture
    • LDLT matrix inversion algorithm
    • Three-point Winograd DFT
    • Memory Constrained Scheduling
    • Five-point Winograd DFT
  • Research functions
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API¶

  • b_asic.architecture
  • b_asic.core_operations
  • b_asic.graph_component
  • b_asic.list_schedulers
  • b_asic.operation
  • b_asic.port
  • b_asic.process
  • b_asic.quantization
  • b_asic.resources
  • b_asic.save_load_structure
  • b_asic.schedule
  • b_asic.scheduler
  • b_asic.sfg_generators
  • b_asic.signal
  • b_asic.signal_flow_graph
  • b_asic.signal_generator
  • b_asic.simulation
  • b_asic.special_operations
  • b_asic.utils
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